The present disclosure relates to a semiconductor light emitting element and method for manufacturing the same.
In the field of semiconductor light emitting element (such as LED), technologies for transferring a semiconductor stacked layer structure which has a light emitting layer from a growth substrate-side of wafer (sapphire, GaN etc.,) to a support substrate-side wafer made of a foreign material (Si, Cu, Mo, W, Al, C or a compound including those) which has excellent heat releasing property or workability have been developed. Particularly noteworthy is a technology in which a growth substrate-side wafer and a support substrate-side wafer are bonded together, then the growth substrate is removed.
For bonding technology, eutectic bonding which employs an alloy material such as AuSn or SnPd is well known, in which the temperature of a bonded wafers is increased to its eutectic point to allow the alloy layer between the wafers to liquefy, which then forms an eutectic in a cooling process to bond the wafers with each other. Eutectic bonding has an advantage in which the alloy between the wafers is once liquefies during eutectic bonding, which allows easy bonding even in the case where the wafers have rather irregular surfaces. However, in the case where the alloy is AuSn, a high temperature of 300° C. or more is necessary in bonding, which may results in thermal damage to the electrodes disposed on the wafer and/or deterioration of electrical contact between the semiconductor stacked layer structure and the electrodes. In the case where SnPd which allows bonding of a low temperature is used, thermal damage may be avoided during the bonding. However, the eutectic portion can be re-liquefied at a low temperature, which may decrease the reliability of the bonding under circumstances where a heat is applied after manufacture of the LED.
Further, in the case where the bonded layer contains voids, the stress loaded on the semiconductor stacked layer structure over the voids is significantly differ from that over normal bonded portions, which may results in generation of damaged portions (cracks etc.) in the semiconductor stacked layer structure over the voids when the stress applied thereon changes at the time when the growth substrate is removed by using LLO (Laser Lift Off) process.
A known technology relates to wafer bonding, which is to remove the damaged portions generated during the LLO process is disclosed (for example, see Japanese Patent Publication No. 2006-86388A), in which, a semiconductor thin layer is disposed on a substrate, and then, the semiconductor thin layer is removed from the substrate by using laser abbreviation or the like, then the semiconductor thin layer is polished by way of CMP (Chemical Mechanical Polishing) to smooth the surface and to remove the damaged portions of the semiconductor thin layer.
However, if a large void is contained in the bonding layer, it may cause a generation of crack which reaches the light emitting layer, which may lead short circuit or the like, thus may results in degradation of reliability of the products. Such voids in the bonding layer may results in complete or partial detachment of the corresponding layers even after completion of the LED production, which would lead to degradation of the quality of the products.
Further, according to Japanese Patent Publication No. 2006-86388A, the semiconductor light emitting element has an n-side electrode made of an n-side contact metal layer and an n-side transparent electrode layer disposed on the gallium nitride layer which is detached from the substrate, so that the light extracting surface of the semiconductor light emitting element is shaded by the electrode.